ChangXin Memory Technologies (CXMT) plans to launch a next-generation DDR5 RDIMM server memory chip by the end of 2026. The chip will use a 4F² DRAM architecture, marking a shift from product iteration toward more fundamental architectural innovation.
The 4F² design aims to increase memory density by reducing memory-cell area compared with the industry-standard 6F² architecture. Industry experts view the development as a significant step in China’s efforts to advance its domestic semiconductor industry, particularly in high-performance server memory. It could also increase competition for established global DRAM manufacturers.