TSMC reports significant customer interest in its next-generation A14 process technology, slated for volume production in 2028. Development progresses well, with customer tape-outs already underway. These tape-outs are ahead of schedule, spanning the smartphone, high-performance computing (HPC), and AI sectors.
The A14 node will use second-generation nanosheet transistors. It offers significant improvements over the 2-nanometer (N2) process. Projections indicate a 10-15% performance boost at the same power level. Alternatively, it offers a 25-30% reduction in power consumption at the same speed. The node also provides a nearly 20% increase in logic density.
Development shows promising results. Test chips near 90% of their device performance targets. They also near their SRAM yield targets.