Credo and AMD Collaborate to Address AI 'Memory Wall'

Credo Technology Group demonstrates a new solution for AI accelerator memory bottlenecks at the OCP Global Summit 2026. It showcases its OmniConnect Weaver memory fanout gearbox. This operates on an AMD Versal™ AI Edge Series Gen 2 evaluation board.

The collaboration enables programmable logic-based AI accelerators to achieve terabyte-class memory capacity and bandwidth. This performance level was previously reserved for custom-designed chips. The technology aims to solve the "memory wall" problem. Memory data supply constrains processor speed. This is a critical bottleneck for scaling AI inference workloads.

The demonstration shows expanded memory is achieved on standard organic packaging without a silicon interposer. Application software runs unmodified. This innovation makes high-performance memory scaling more accessible for system integrators using programmable logic.